| Brian Bailey is
the Chief Technologist at Poseidon Design Systems. He has spent
over 20 years creating verification solutions in a number of
EDA companies and in recent years has spent most of his time
helping the industry understand how and when to adopt new verification
methodologies. He is currently working on ESL tools to handle
multi-processor systems |
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| Grant Martin is a chief scientist at Tensilica, Inc.
in Santa Clara, CA. Prior to Tensilica, Grant worked at Burroughs
in Scotland for 6 years, BNR/Nortel in Canada for 10 years,
and Cadence for 9 years. His main areas of interest are IP-based
design, platform-based design of SoC, and system-level design. |
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| Thomas Anderson is a Director of Technical Marketing
at Synopsys, Inc. in Mountain View, CA and chair of the VSIA
functional verification working group. Previously he was Vice
President of Applications Engineering at 0-In and Vice President
of Engineering at Virtual Chips. He has authored over 100 papers
and technical articles on verification, IP and interface standards.
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